NAND CMOS Gate for Electronics Module
Abstract
VLSI integrated circuits (large scale integration) are those that are characterized by their extremely small dimensions, consisting mainly of semiconductor oxide metal field effect transistors (MOSFET), whose channel lengths are less than micrometer, allowing the integration of a greater number of transistors per cm2 in a single design. In the present work, a NAND gate based on CMOS technology is designed by Tanner Eda's L-Edit tool, performing the necessary mathematical calculations for the determination of the W, L ratios of the MOSFET transistors, following the established design rules at the time of designing the respective layout. For the creation of design libraries and their subsequent use in larger and more complex integrated circuits.
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References
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