FPGA Emulation of Reconfigurable Carrier CSK Chaotic Modulation Scheme

Keywords: chaos, CSK, FPGA, modulation, VHDL

Abstract

This article introduces the architecture of a transmitter-receiver system that employs chaotic CSK modulation and Hamiltonian synchronization. To generate the carriers, an oscillator was utilized, which emulates the behavior of multiple chaotic oscillators. In this particular case, six chaotic oscillators were generated, with three operating in three dimensions (3D) and the other three in four dimensions (4D). The architecture was implemented on an Artix7-AC701 FPGA board featuring the xc7a200tfbg676 chip. Binary arithmetic with a precision of 32 bits was employed, with 1 bit assigned for the sign, 21 for the integer part, and 10 for the fractional part. To avoid exceeding the logical resources of the FPGA chip, the midpoint method was implemented. This method ensures that the generated chaotic oscillators do not diverge in their trajectories. The primary contribution of this study is a synchronization method for variables, where each variation corresponds to a different oscillator, either in the three-dimensional or hyperplane domain.

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Published
2023-09-11
How to Cite
Núñez-Pérez, J. C., Estudillo-Valdez, M. A., & Calvillo-Téllez, A. (2023). FPGA Emulation of Reconfigurable Carrier CSK Chaotic Modulation Scheme. Pädi Boletín Científico De Ciencias Básicas E Ingenierías Del ICBI, 11(Especial2), 167-174. https://doi.org/10.29057/icbi.v11iEspecial2.10849